1. Field of the Invention
The present invention relates to a power amplifier, and particularly, to a power amplifier including a plurality of amplification stages.
2. Description of the Background Art
In recent years, radio communication systems using a quasi-microwave band or a microwave band, represented by mobile communication systems such as a mobile phone, have rapidly come into wide use. This is greatly attributed to the reduction in weight and power consumption of the mobile terminals. To make the mobile terminal lightweight, it is effective to reduce the weight and capacity of a battery employed therefor. On the other hand, the battery having a small capacity is exhausted in a short time. Thus there has been strong demand for the reduction of power consumption of a transmission power amplifier, which consumes most of the electric power of the mobile terminal in transmission. That is, improvement in electric power efficiency has been strongly demanded for.
In the recent digital modulation and demodulation using OFDM (Orthogonal Frequency Division Multiplexing) modulation technique and the like, the power amplifier is required to amplify an input signal linearly because information is represented by both amplitude and phase of the signal. On the other hand, generally, in the power amplifier, as an output electric power becomes closer to saturation owing to an increase in input electric power, distortion and power efficiency become increasingly high. Thus a high power efficiency and a low distortion are in a reciprocal relationship.
Before the power amplifier is specifically described, first, terms used in the present specification are described. In the present specification, expressions “near-Class A bias”, “near-Class B bias” are frequently used, which are generally intended to express certain ranges around “Class A to Class AB bias” and “Class B to Class AB bias”, respectively. In recent power amplifiers, it is not unusual that a bias point dynamically changes in accordance with the operating power, and therefore defining the bias point strictly by words may invite unnecessary complication.
Additionally, expressions “without a distortion compensation circuit”, “not compensated for distortion”, and “not through a distortion compensation circuit” are used. Generally in the field of electric circuits, “without a certain circuit” does not necessarily mean that the circuit is totally physically absent, but it means that the effect is suppressed to be “weak”. This holds true for the distortion compensation circuit. For example, if great resistances are inserted in various portions of the circuit to shut off the current, the effect can easily be suppressed to be weak. The above expressions are used in such context.
FIG. 4 is a circuit block diagram showing a configuration of a conventional power amplifier. Such a power amplifier is disclosed in Japanese Patent Laying-Open No. 2002-084144, for example. Referring to FIG. 4, in the power amplifier, two stages of emitter-grounded bipolar transistors 33 and 34 are provided between an input terminal 31 and an output terminal 32. Between input terminal 31 and the base of front-stage transistor 33, a matching circuit 35 is provided. Between the collector of front-stage transistor 33 and the base of rear-stage transistor 34, a matching circuit 36 is provided. Between rear-stage transistor 34 and output terminal 32, a matching circuit 37 is provided. Matching circuits 35-37 are circuits for adjusting reflected power.
To the collectors of transistors 33 and 34, a collector bias voltage is supplied through power supply terminals 38 and 39. To the base of front-stage transistor 33, a bias voltage is supplied through power supply terminal 40 and not through a distortion compensation circuit (to adjust the distortion compensation effect to be weak). To the base of rear-stage transistor 34, a bias voltage is supplied from power supply terminal 41 through a distortion compensation circuit 42 (to adjust the distortion compensation effect to be enhanced). Front-stage transistor 33 is biased into near-Class A, while rear-stage transistor 34 is biased into near-Class B.
There are various types of distortion compensation circuit 42, for example as represented by those shown in FIGS. 5-8. The distortion compensation circuit in FIG. 5 includes a terminal 51 connected to a power supply terminal 41, a terminal 52 connected to the base of transistor 34, a resistor element 53 and a variable impedance element 54 serially connected between terminals 51 and 52, and a resistor element 55 and a capacitor 56 serially connected between a node N53, arranged between resistance element 53 and variable impedance element 54, and a line of ground potential GND.
The distortion compensation circuit shown in FIG. 6 corresponds to the distortion compensation circuit shown in FIG. 5 in which variable impedance element 54 is replaced by a diode 57. Diode 57 has its anode connected to node N53 and has its cathode connected to terminal 52. The distortion compensation circuit in FIG. 7 corresponds to the distortion compensation circuit shown in FIG. 6 in which diode 57 is replaced by a bipolar transistor 58. Transistor 58 has its base connected to node N53 and has its emitter connected to terminal 52. The distortion compensation circuit shown in FIG. 8 corresponds to the distortion compensation circuit shown in FIG. 7 in which resistor element 55 is eliminated and a resistor element 59 is added. Capacitor 56 is connected between node N53 and a line of ground potential GND, and resistor element 59 is connected between node N53 and the collector of transistor 58.
Variable impedance element 54, diode 57, transistor 58 are nonlinear elements that actually serve to compensate for distortion. Resistor element 53 primarily serves to adjust DC current. Resistors 55 and 59 and capacitor 56 primarily serve to adjust nonlinearity.
FIGS. 9A-9C are for describing the principle of distortion compensation in the power amplifier shown in FIG. 4. In each of FIGS. 9A-9C, the axis of abscissa indicates output power [dBm] while the axis of ordinate indicates gain [dB].
FIG. 9A shows the gain characteristic of front-stage transistor 33 without a distortion compensation circuit (with weak distortion compensation effect). The characteristic more or less changes depending on the bias point. When transistor 33 is biased into near-Class A bias, its gain characteristic shows a nonlinear characteristic generally falling rightward.
FIG. 9B shows the gain characteristic of rear-stage transistor 34 to which a distortion compensation circuit 42 is connected. The characteristic greatly changes depending on the bias point. When transistor 34 is biased into near-Class B bias, its gain characteristics shows a nonlinear characteristic generally rising rightward.
FIG. 9C shows the gain characteristic of the entire power amplifier, in which the rightward falling gain characteristic of front-stage transistor 33 and the rightward rising gain characteristic of rear-stage transistor 34 are combined. Adjusting respective gain characteristics of transistors 33 and 34, the nonlinearity of transistor 33 and that of transistor 34 cancel each other, whereby a flat and constant gain characteristic can be implemented. That is, a power amplifier having an excellent linearity can be realized. In FIG. 9C, Section A is the range where gain is flattened.
However, although the conventional power amplifier is effective for achieving linearization in Section A where the output power is relatively small, it is not effective for achieving linearization in Section B where the output power is great and approximating saturation. Hence, further improvement has been required.
Assume an “ideal power amplifier characteristic” in which linearity is ensured closely to the saturation point. It may be represented by the dashed line in FIG. 9C. That is, the right side of the curve indicative of the gain characteristic projects at a right angle.